1. Field of Invention
The present invention relates to a method of producing a semiconductor device, to a method of producing an electro-optical device such as an active matrix driving liquid crystal device, to a semiconductor device, and to an electro-optical device. More particularly, the present invention relates to a semiconductor device and an electro-optical device, each having a thin film transistor (hereinafter also referred to as a TFT) and an additional storage capacitor both formed on a substrate, and also relates to a method of producing such a semiconductor device and a method of producing such an electro-optical device.
2. Description of Related Art
In a TFT-driven active matrix liquid crystal device according to a conventional technique, TFTs are disposed at respective intersections of a great number of scanning lines and data lines extending horizontally and vertically, respectively, wherein the gate electrode of each TFT is connected to one scanning line, the source region of each TFT is connected to one data line, and the drain region of each TFT is connected to one pixel electrode via a contact hole formed through an interlayer insulating film for electrically isolating various layers forming TFTs and interconnection lines and pixel electrodes. Thus, the pixel electrodes and the corresponding semiconductor layers are connected to each other through contact holes extending across a large interlayer distance of 1000 nm or greater. In particular, in the case of polysilicon TFTs of the normal stagger or coplanar type having a top gate structure in which the gate electrode is disposed above the semiconductor layer when seen from the side of the TFT array substrate, the interlayer distance of the contact holes becomes very long, and thus, it becomes difficult to form the contact holes. More specifically, because the etching accuracy becomes worse as the etching depth increases, there is a possibility that overetching occurs to a great extent, which causes a hole to be formed through the semiconductor layer. Thus, it is very difficult to form such a deep contact hole using only a dry etching process. One technique to solve the above problem is to employ a combination of dry etching and wet etching. However, this technique results in another problem in that the wet etching can cause the contact hole to be expanded in a lateral direction. As a result, it becomes difficult to form contact holes with a sufficiently small diameter, and thus, it becomes difficult to lay a required number of interconnections and electrodes in a limited area on a substrate.
The technique of connecting an additional storage capacitor to a TFT is employed not only in electro-optical devices, but also in semiconductor devices such as a dynamic type shift register or a DRAM (dynamic random access memory).
In general, in the art of electro-optical devices of the above-described type, there is a significant need for improvement in image quality. To this end, it is very important to achieve an image display area with a higher resolution by reducing the pixel pitch. It is also very important to increase the pixel aperture ratio (the ratio of an aperture area of a pixel through which image light can pass to a non-aperture area of the pixel through which image light cannot pass).
If the pixel pitch is reduced, interconnections and electrodes occupy a greater area in the image display area relative to the total image display area, because there are essential lower limits in the electrode size, the interconnection width and the contact hole diameter due to limitations of production technology. As a result, the pixel aperture ratio becomes low. Another problem resulting from the reduction in the pixel pitch is that it becomes difficult for a storage capacitor to have a sufficiently large capacitance to maintain a signal voltage applied to a pixel electrode, because the storage capacitor has to be formed in a smaller limited area on a substrate.
Also in other semiconductor devices such as a dynamic shift register or a DRAM having a storage capacitor, as in the pixel switching TFT described above, there is difficulty in reducing the feature size of circuit elements including storage capacitors due to a limitation of a processing technique of forming a contact hole reaching a semiconductor layer on a substrate.
In view of the above, it is an object of the present invention to provide a method of producing a semiconductor device and an electro-optical device capable of forming a good electrical connection between a pixel electrode or an interconnection line and a TFT, and also capable of forming a storage capacitor with an increased capacitance, thereby realizing a semiconductor device and an electro-optical device having high reliability by using a relatively simple structure having a small feature size of pixel pitch or circuit pitch.
According to an aspect of the present invention, to achieve the above object, there is provided a method of producing a semiconductor device, which may consist the steps of: forming a semiconductor layer on a substrate, the semiconductor layer serving as source and drain regions of a thin film transistor and a first capacitor electrode of a storage capacitor; forming a first insulating thin film on the semiconductor layer; forming a gate electrode and a second capacitance electrode of the storage capacitor, on the first insulating thin film, using the same film; forming a second insulating thin film on the surface of the gate electrode and on the surface of the second capacitor electrode; and forming a conductive layer serving as a third capacitor electrode of the storage capacitor, the conductive layer being connected to the semiconductor layer and opposing the second capacitor electrode via the second insulating thin film.
In this method, the first capacitor electrode is formed of the semiconductor layer which is also used to form the source and drain regions, the scanning line and the second capacitor electrode are formed of the same film, and the conductive layer serving as the third capacitor electrode is formed on the second capacitor electrode via the second insulating thin film such that a first storage capacitor is formed by the first and second capacitor electrodes and the first insulating thin film disposed between the first and second capacitor electrodes, and such that a second storage capacitor is formed by the second capacitor electrode and the conductive layer and the second insulating thin film disposed between the second capacitor electrode and the conductive layer. Thus, the storage capacitors can be easily formed using a process including a relatively small number of steps.
In particular, because the conductive layer is formed using a space on the second capacitor electrode instead of forming it on the gate electrode, it is possible to eliminate a parasitic capacitance which may occur between the gate electrode and the drain region connected to the conductive layer if the conductive layer is formed on the gate electrode. This makes it possible to prevent degradation in the image quality due to parasitic capacitance.
In a method of producing a semiconductor device according to another aspect of the present invention, the second insulating thin film includes an oxide film formed by oxidizing the surface of the gate electrode and the surface of the second capacitor electrode.
In this aspect, because the second insulating thin film serving as a dielectric film is formed by oxidizing the surface of the gate electrode and the surface of the second capacitor electrode, a high-quality interface having good uniformity and good adherence is obtained between the second insulating thin film realized in the form of an oxide film and the gate electrode and between the second insulating thin film and the second capacitor electrode. This resultant second insulating thin film has a low density of defects and has a high breakdown voltage, even if the thickness thereof is rather small. Thus, by partially using the conductive layer to form the third capacitor electrode which opposes the second capacitor electrode via the second insulating thin film, it is possible to form a storage capacitor whose dielectric film is realized by the second insulating thin film having the high breakdown voltage and having the low density of defects.
This technique makes it possible to produce a storage capacitor having large capacitance and having good reliability. If the dielectric film on the gate electrode and second capacitor electrode is formed by means of a process other than oxidation, such as sputtering or CVD (chemical vapor deposition), then the resultant dielectric film will have a low breakdown voltage and tends to have faulty insulation.
To obtain a high enough breakdown voltage and sufficiently good isolation using such a dielectric film, it is required to increase the thickness of the dielectric film to a great extent. However, such an increase in the thickness often results in formation of steps in various layers formed above the dielectric film and also results in an increase in production cost. Furthermore, the increase in the thickness of the dielectric film results in a reduction in the storage capacitance per unit area, and thus this dielectric film is not suitable as the dielectric film of the storage capacitor. In contrast, in the present invention, the oxide film is employed as the dielectric film as described above, and thus the dielectric film has as high quality as the gate insulating film of the thin film transistor. This results in an improvement in overall reliability of the semiconductor device, and also an improvement in production yield.
In this production method according to the present invention, the oxide film is preferably a thermal oxide film formed by thermally oxidizing the surface of the gate electrode and the surface of the second capacitor electrode at a temperature in the range from 900xc2x0 C. to 1200xc2x0 C.
According to this aspect of the invention, it is possible to relatively easily form a thin oxide film having a high breakdown voltage and a low defect density on the gate electrode and the second capacitor electrode by performing a high-temperature process using a quartz substrate.
In this aspect of the invention, the production method preferably includes a further step of selectively doping an impurity into the semiconductor layer before the step of forming the thermal oxide film, wherein the impurity doped in the semiconductor layer is activated when the thermal oxide film is formed in the step of forming the thermal oxide film.
According to this aspect of the invention, the heat treatment, required to activate the impurity doped in the semiconductor layer so that the doped impurity becomes bonded in the crystal lattice, is performed simultaneously during the process of forming the oxide film, and thus the production process is simplified.
The steps following the step of forming the second dielectric film may be performed at temperatures equal to or lower than 400xc2x0 C.
In this case, materials having low heat resistance may be used to form layers in the steps after forming the oxide film.
The gate electrode and the second capacitor electrode may be formed of a silicon thin-film.
In this case, the oxide film including the dielectric film is a silicon oxide film formed by thermally oxidizing the surface of the polysilicon film, and thus a high-quality interface having good uniformity and good adherence is obtained between the oxide film and the gate electrode and between the oxide film and the second capacitor electrode. This makes it possible to form the oxide film as an insulating film so as to have a small thickness, a high breakdown voltage and a low density of defects.
Alternatively, the oxide film may be an anodic oxide film formed by anodizing the surface of the gate electrode and the surface of the second capacitor electrode.
In this case, the oxide film including the dielectric film is a metal oxide film formed by anodizing the surface of a film of anodizable metal such as tantalum or aluminum, and thus a high-quality interface having good uniformity and good adherence is obtained between the oxide film and the gate electrode and between the oxide film and the second capacitor electrode. Therefore, it is possible to form the oxide film as an insulating film so as to have a small thickness, a high breakdown voltage and a low density of defects. In particular, when a tantalum oxide film is formed by anodizing tantalum, the resultant insulating film has a high dielectric constant of about 21.7 in contrast to the silicon oxide film having a dielectric constant of about 3.9.
In another aspect of the semiconductor device production method according to the present invention, the second insulating thin film preferably has a thickness in the range from 10 nm to 200 nm.
In this aspect, the second insulating thin film is formed so as to have a relatively small thickness, in the range of 10 nm to 200 nm, which does not result in a short circuit between electrodes through the second insulating thin film. Such a small thickness of the second insulating thin film is advantageous when it is used as the dielectric film of the storage capacitor. Even when the thickness is reduced to such a small value, it is still possible to obtain a good interface between the second insulating thin film and the scanning line and between the second insulating thin film and the second capacitor electrode.
In another aspect of the semiconductor device production method according to the present invention, the method preferably includes a further step of forming a third insulating thin film between the second insulating thin film and the conductive layer.
In this aspect, the insulating film is formed in a laminated structure or a multilayer structure consisting of the second insulating thin film and the third insulating thin film formed thereon, and thus the resultant insulating film can be used as a dielectric film having a higher breakdown voltage and a lower density of defects. Furthermore, it becomes possible to suppress shrinkage or warp of a substrate due to heating, even when a large-sized mother substrate is employed.
In this aspect, the third insulating thin film may be formed of at least one of a silicon oxide film and a silicon nitride film.
In this case, the insulating film is formed into a laminated structure or a multilayer structure including two ore more layers of silicon oxide or silicon nitride. Herein, the silicon oxide film and the silicon nitride film may be formed using a CVD technique, a sputtering method or the like. Silicon oxide films and the silicon nitride-films may be alternately formed into a multilayer structure.
In another aspect of the semiconductor device production method according to the present invention, the method preferably includes a further step of doping an impurity into the semiconductor layer using the gate electrode as a mask, before forming the second insulating thin film, wherein after doping the impurity into the semiconductor layer, the second insulating thin film is formed by oxidizing the surface of the gate electrode and the surface of the second capacitor electrode.
In this aspect, after doping the impurity into the semiconductor layer using the gate electrode as the mask having a width greater than a final value, the semiconductor layer is oxidized. The width of the gate electrode and the width of the second capacitor electrode decrease during the oxidization process. The reduction in the width results in formation of regions doped with no impurity between the edges of the width of the gate electrode and the edges of the regions doped with the impurity. The these undoped regions of the semiconductor layer may serve as offset regions.
Alternatively, a low concentration of impurity may be selectively implanted into these regions at a properly selected acceleration energy thereby forming LDD (lightly doped drain) regions. In any case, a photolithography process is not required. It is also possible to suppress variations in characteristics caused by an alignment error of an exposure apparatus in the photolithography process, and thus, it is possible to form a thin film transistor so as to have a shorter channel length which allows a reduction in the size of a semiconductor device.
In another aspect of the semiconductor device production method according to the present invention, the method preferably includes further steps of doping the semiconductor layer with a first concentration of impurity using the gate electrode as a mask, before forming the second insulating thin film; and doping the semiconductor layer with a second concentration of impurity via a mask which completely covers the gate electrode and which has a width greater than the width of the gate electrode.
In this aspect, after doping the impurity into the semiconductor layer using the gate electrode as the mask having a width greater than a final value, the semiconductor layer is oxidized. The width of the gate electrode decreases during the oxidization process as described above, and the reduction in the width results in formation of regions doped with no impurity between the edges of the width of the gate electrode and the edges of the regions doped with the impurity. These regions serve as offset regions. When the semiconductor layer is further doped with the second concentration of impurity via the mask which completely covers the gate electrode and which has a width greater than the width of the gate electrode, LDD regions are formed in the semiconductor layer at locations immediately below the mask. Thus, it is possible to realize a thin film transistor having both offset regions and LDD regions using the production process including less number of steps associated with photolithography. This allows the thin film transistor to have a higher breakdown voltage. Furthermore, it is possible to form the thin film transistor so as to have a shorter channel length which allows a reduction in the size of a semiconductor device.
In another aspect of the semiconductor device production method according to the present invention, the method preferably includes further steps of doping the semiconductor layer with a first concentration of impurity using the gate electrode as a mask, before forming the second insulating thin film; and selectively doping the semiconductor layer with a second concentration of impurity, after forming the second insulating thin film.
In this aspect, after doping the impurity into the semiconductor layer using the gate electrode as the mask having a width greater than a final value, the semiconductor layer is oxidized. The width of the gate electrode decrease during the oxidization process. As a result, regions doped with no impurity are formed between the edges of the gate electrode and the edges of the regions doped with the impurity. After that, the second concentration of impurity is selectively implanted into the undoped regions of the semiconductor layer between the edges of the gate electrode and the edges of the regions doped with the first concentration of impurity, at an acceleration energy which is selected, taking into account the thickness of the second insulating thin film formed on the side walls of the gate electrode, thereby forming LDD regions.
In this technique, because the LDD regions are formed without using the photolithography process, it is possible to eliminate a reduction in production yield which would occur during the photolithography process. It is also possible to eliminate variations in characteristics caused by an alignment error of an exposure apparatus in the photolithography process, and thus, it becomes possible to form the thin film transistor so as to have a shorter channel length, which allows a reduction in the size of a semiconductor device.
In another aspect of the semiconductor device production method according to the present invention, the method preferably includes a further step of selectively doping an impurity into the semiconductor layer after forming the second insulating thin film.
In this aspect, using the second insulating thin film formed on the side walls of the gate electrode, the doping of the impurity into regions of the semiconductor layer other than the region below the gate electrode and below the side walls of the gate electrode, and the doping of the impurity into the regions of the semiconductor layer immediately below the second insulating thin film formed on the side walls of the gate electrode, can be performed by properly selecting the acceleration energy for the respective implantation processes. Thus, the offset regions or the LDD regions can be formed at locations adjacent to the channel region without using the photolithography process. This eliminates a reduction in production yield which would occur during the photolithography process. It is also possible to eliminate variations in characteristics caused by an alignment error of an exposure apparatus in the photolithography process.
According to another aspect of the invention, there is provided a semiconductor device which may consist of a third capacitor electrode formed of a multilayer film including two or more layers of conductive polysilicon film and refractory metal.
In this aspect, the third capacitor electrode formed of the electrically conductive polysilicon film does not serve as a light blocking film but can serve to increase the storage capacitor and to provide an interconnection. When the semiconductor layer is electrically connected to the electrically conductive polysilicon film, if they are formed of the same polysilicon film, then the contact resistance between them is reduced to a very low level. If a refractory metal layer is formed on the electrically conductive polysilicon film into a multilayer structure, the resultant multilayer film can serve as a light-shielding film, and a further reduction in resistance can be achieved.
According to another aspect of the present invention, there is provided a method of producing an electro-optical device including a data line and a pixel electrode both formed on the above-described substrate, the data line being connected to the source region of the thin film transistor, the pixel electrode being connected to the drain region of the thin film transistor, the method including the steps of: forming a first interlayer insulating film on the semiconductor layer, the first insulating thin film, the gate electrode, the second insulating thin film, and the conductive layer; forming the data line such that the data line is connected to the source region via a contact hole formed through the first interlayer insulating film, the first insulating thin film, and the second insulating thin film; forming a second interlayer insulating film on the data line; and forming the pixel electrode such that the pixel electrode is connected to the conductive layer via a contact hole formed through the first and second interlayer insulating films.
In this electro-optical device according to the present invention, the scanning line, the second capacitor electrode, the second insulating thin film, the conductive layer, the first interlayer insulating film, and the data line are formed successively on the substrate in the order described above, and the pixel electrode is formed at the top. The data line is electrically connected to the source region of the semiconductor layer via the contact hole formed through the first insulating thin film and the first interlayer insulating film. Thus, the conductive layer located between the scanning line and the data line may be used for various purposes. More specifically, if the conductive layer and the semiconductor layer are electrically connected to each other via a contact hole, and the conductive layer and the pixel electrode are also electrically connected to each other via a contact hole, then the semiconductor layer and the pixel electrode are electrically connected to each other via the conductive layer. Furthermore, if a part of the conductive layer is employed as a third capacitor electrode located opposite a part of the semiconductor layer or the second capacitor electrode via the second insulating thin film, then a large storage capacitor can be added to the pixel electrode.
Furthermore, it possible to form a contact hole with a small diameter compared with the case where a single contact hole is formed such that it extends from the pixel electrode to the drain region. That is, because the etching accuracy becomes worse as the contact hole is etched to a greater depth, there is a possibility that etching occurs beyond the bottom of the insulating film, and the thin semiconductor layer is etched across the entire thickness thereof.
To avoid the above problem, the dry etching process capable of forming the contact hole so as to have a small diameter has to be stopped before the etching reaches the semiconductor layer, and the remaining part to the semiconductor layer has to be etched by means of wet etching. However, because the wet etching occurs in an isotropic fashion, the contact hole is expanded in a lateral direction. In contrast, in the present invention, the pixel electrode and the drain regions are connected to each other via two serial contact holes which can be formed by means of dry etching. Even when a mixture of wet and dry etching is employed, the distance of the contact holes formed by wet etching can be reduced. Thus, the contact holes can be formed so as to have a small diameter, and a recess or a step formed on the surface of the conductive layer at a location corresponding to the contact hole on the side of the semiconductor layer can be minimized. As a result, the pixel electrode in this area can be planarized in a better fashion. Furthermore, a recess or a step formed on the surface of the pixel electrode at a location corresponding to the contact hole on the side of the pixel electrode is also minimized, and thus the surface of the pixel electrode in this area can be planarized in a better fashion. As a result, an electro-optical material such as a liquid crystal has a smaller number of defects such as a disclination due to a recess or a step on the surface of the pixel electrode.
The present invention also provides a semiconductor device which may consist of: a semiconductor layer formed on a substrate so as to serve as a source region, a drain region, and a channel region of a thin film transistor; a first insulating thin film formed on the semiconductor layer; and a gate electrode formed on the first insulating thin film, wherein at least one of the source region and the drain region of the thin film transistor includes: a high-concentration impurity region; a low-concentration impurity region disposed between the high-concentration impurity region and the channel region; and an offset region disposed between the low-concentration impurity region and the channel region, the offset region being located directly adjacent to the channel region.
In this aspect, the offset regions and the LDD regions formed in the thin film transistor allow the semiconductor device to have an extremely low current in an off-state.
According to another aspect of the present invention, there is provided a semiconductor device which may consist of: a semiconductor layer formed on a substrate so as to serve as a source region, a drain region, and a channel region of a thin film transistor and a first capacitor electrode of a storage capacitor; a first insulating thin film formed on the semiconductor layer; a gate electrode and a second capacitor electrode of the storage capacitor both formed on the first insulating thin film; a second insulating thin film formed on the surface of the gate electrode and on the surface of the second capacitor electrode; and a conductive layer serving as a third capacitor electrode of the storage capacitor, the conductive layer being connected to the semiconductor layer, the conductive layer opposing the second capacitor electrode via the second insulating thin film, wherein at least one of the source region and the drain region of the thin film transistor includes: a high-concentration impurity region; a low-concentration impurity region disposed between the high-concentration impurity region and the channel region; and an offset region disposed between the low-concentration impurity region and the channel region, the offset region being located directly adjacent to the channel region.
The thin film transistor according to this aspect has the offset regions and the LDD regions, and thus, it is possible to realize a semiconductor device having an extremely low current in an off-state. Furthermore, a storage capacitor with a large capacitance can be realized.
According to another aspect of the present invention, there is provided an electro-optical device which may consist of a data line and a pixel electrode both formed on the substrate of the semiconductor device described above, the data line being connected to the source region of the thin film transistor, the pixel electrode being connected to the drain region of the thin film transistor, the electro-optical device may further consist of: a first interlayer insulating film formed on the semiconductor layer, the first insulating thin film, the gate electrode, the second insulating thin film, and the conductive layer; and a second interlayer insulating film formed on the first interlayer insulating film, the data line being connected to said source region via a contact hole formed through the first interlayer insulating film, the first insulating thin film, and the second insulating thin film, the pixel electrode being connected to the conductive layer via a contact hole formed through the first and second interlayer insulating films.
In the electro-optical device according to the present aspect of the invention, the thin film transistor has the offset regions and the LDD regions, and thus has an extremely low current in an off-state. This allows the electro-optical device to display a high-quality image.